Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T Datenbogen
Produktcode
TMDXEVM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
Table 7-55. CRGEN1 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0x01C2 6400
PID
CRGEN Peripheral Identification Register
0x01C2 6404
CONTROL
CRGEN control register
0x01C2 6408
STC_HI
System Time Clock (STC) current value (upper 17 bits)
0x01C2 640C
STC_LO
STC current value (lower 16 bits plus extension)
0x01C2 6410
STC_VAL_HI
STC value (upper 17 bits) on TSIF1 PCR packet detection
STC value (lower 16 bits plus extension) on TSIF1 PCR packet
0x01C2 6414
STC_VAL_LO
detection
Program Clock Reference (PCR) value (upper 17 bits) from
0x01C2 6418
PCR_HI
TSIF1 Receive packet
PCR value (lower 16 bits plus extension) from TSIF1 Receive
0x01C2 641C
PCR_LO
packet
0x01C2 6420
PCR_PKT_STAT
PCR packet status
0x01C2 6424
LOOP_FILTER
Loop filter (LPF) interface
Offset value of the STC counter for the higher 17 bits. This
0x01C2 6428
STC_OFFSET_HI
value is detected in the STC counter with the first PCR loading
pulse signal.
pulse signal.
Offset value of the STC counter for the lower 16 bits. The role
0x01C2 642C
STC_OFFSET_LO
of this register is same as the STC_LO register 0x01C2 640C.
0x01C2 6430 - 0x01C2 643F
-
Reserved
0x01C2 6440
INTEN
Interrupt enable
0x01C2 6444
INTEN_SET
Interrupt enable set
0x01C2 6448
INTEN_CLR
Interrupt enable clear
0x01C2 644C
INTSTAT
Interrupt status
0x01C2 6450
INTSTAT_CLR
Interrupt status clear
0x01C2 6454
EMU_CTRL
Emulation control
0x01C2 6458 - 0x01C2 647F
-
Reserved
238
Peripheral Information and Electrical Specifications
Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Link(s):