Texas Instruments CC2650DK Benutzerhandbuch
Cortex-M3 Processor Registers
2.7.1.34 TPR Register (Offset = E40h) [reset = X]
TPR is shown in
and described in
Trace Privilege This register is used to enable an operating system to control which stimulus ports are
accessible by user code. This register can only be used in privileged mode.
accessible by user code. This register can only be used in privileged mode.
Figure 2-37. TPR Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESERVED
R/W-X
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
PRIVMASK
R/W-X
R/W-X
Table 2-60. TPR Register Field Descriptions
Bit
Field
Type
Reset
Description
31-4
RESERVED
R/W
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
3-0
PRIVMASK
R/W
X
Bit mask to enable unprivileged (User) access to ITM stimulus ports:
Bit [0] enables stimulus ports 0, 1, ..., and 7. Bit [1] enables stimulus
ports 8, 9, ..., and 15. Bit [2] enables stimulus ports 16, 17, ..., and
23. Bit [3] enables stimulus ports 24, 25, ..., and 31. 0: User access
allowed to stimulus ports 1: Privileged access only to stimulus ports
Bit [0] enables stimulus ports 0, 1, ..., and 7. Bit [1] enables stimulus
ports 8, 9, ..., and 15. Bit [2] enables stimulus ports 16, 17, ..., and
23. Bit [3] enables stimulus ports 24, 25, ..., and 31. 0: User access
allowed to stimulus ports 1: Privileged access only to stimulus ports
86
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated