Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP Benutzerhandbuch
6.5
TCP2 Input Configuration Register 3 (TCPIC3)
Registers
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The TCP2 input configuration register 3 (TCPIC3) is shown in
and described in
. TCPIC3
informs the TCP2 on the EDMA3 data flow segmentation.
Figure 36. TCP2 Input Configuration Register 3 (TCPIC3)
31
16
Reserved
R/W-0
15
14
13
12
11
9
8
OUT
INPUT
Reserved
Reserved
Reserved
MINITER
ORDER
SIGN
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
7
4
3
2
1
0
MINITER
Reserved
EPRORED
EXMASTR
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9. TCP2 Input Configuration Register 3 (TCPIC3)
Bit
Field
Value
Description
31-15
Reserved
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
14
OUTORDER
Output bit ordering.
0
Output bit ordering from 0 to 31
1
Output bit ordering from 31 to 0
13
Reserved
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
12
INPUTSIGN
Multiply channel input data.
0
Multiply channel input data by + 1
1
Multiply channel input data by - 1
11-9
Reserved
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
8-4
MINITER
0-31
Minimum number of iterations to be executed
0
1
1
1-31
3-2
Reserved
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
1
EPRORED
Prolog reduction.
0
Prolog reduction disabled
1
Prolog reduction enabled
0
EXMASTR
Disable/enable Max Log-MAP.
0
Max star disabled (enable Max Log-MAP)
1
Max star enabled (enable log MAP)
TMS320C6457 Turbo-Decoder Coprocessor 2
30
SPRUGK1 – March 2009