Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP Benutzerhandbuch
6.7
TCP2 Input Configuration Register 5 (TCPIC5)
6.8
Tail Symbols
Registers
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The TCP2 input configuration register 5 (TCPIC5) is shown in
and described in
.
TCPIC5 provides the 32-bit CRC Polynomial to TCP2.
Figure 38. TCP2 Input Configuration Register 5 (TCPIC5)
31
0
CRCPOLY
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11. TCP2 Input Configuration Register 5 (TCPIC5) Field Descriptions
Bit
Field
Value
Description
31-0
CRCPOLY
0
CRC polynomial. This 32 bit parameter defines the CRC polynomial.
lists some examples
for CRCPOLY.
Table 12. CRC Examples
CRC Length
CRC Poly
Polynomial
6
00000023
X
6
+X
2
+X+1
8
000000CD
X
8
+X
7
+X
4
+X
3
+X+1
10
000003EC
X
10
+X
9
+X
8
+X
7
+X
6
+X
4
+X
3
+1
12
00000F89
X
12
+X
11
+X
10
+X
9
+X
8
+X
4
+X+1
16
0000E433
X
16
+X
15
+X
14
+X
11
+X
6
+X
5
+X
2
+X+1
24
00800043
X
24
+X
7
+X
2
+X+1
32
80000043
X
32
+X
7
+X
2
+X+1
The tail symbols are symbols appended to the end of the information symbols to force both the
non-interleaved encoder to the 0 state and the interleaved encoder to the 0 state. The raw input data
streams for the 6-bit tail symbols are shown in the TCP2 input registers TCPIC6 -11.
non-interleaved encoder to the 0 state and the interleaved encoder to the 0 state. The raw input data
streams for the 6-bit tail symbols are shown in the TCP2 input registers TCPIC6 -11.
It also shows how to load the six 18-bit tail registers in standalone mode. These registers are loaded from
the EDMA3 bus. In shared mode, input registers TCPIC9 - 11 are not used. Regardless of the mode,
these 6 input parameters have to be loaded by the EDMA3 prior to any decoding.
the EDMA3 bus. In shared mode, input registers TCPIC9 - 11 are not used. Regardless of the mode,
these 6 input parameters have to be loaded by the EDMA3 prior to any decoding.
32
TMS320C6457 Turbo-Decoder Coprocessor 2
SPRUGK1 – March 2009