Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  6   TIMER  ARRAY  UNIT 

R01UH0305EJ0200  Rev.2.00 

 

 

214  

Jul 04, 2013 

The TOMm register is used to control the timer output mode of each channel. 

When a channel is used for the independent channel operation function, set the corresponding bit of the channel to be 

used to 0. 

When a channel is used for the simultaneous channel operation function (PWM output, one-shot pulse output, or 

multiple PWM output), set the corresponding bit of the master channel to 0 and the corresponding bit of the slave channel 

to 1. 

The setting of each channel n by this register is reflected at the timing when the timer output signal is set or reset while 

the timer output is enabled (TOEmn = 1). 

The TOMm register can be set by a 16-bit memory manipulation instruction. 

The lower 8 bits of the TOMm register can be set with an 8-bit memory manipulation instruction with TOMmL. 

Reset signal generation clears this register to 0000H. 

 

 

Address: F01BEH, F01BFH (TOM0)    After reset: 0000H     R/W 

Symbol 15 

14 

13

12 

11 

10

9 8 7 6 5 4 3 2 1 0 

TOMm  0 0 0 0 0 0 0 0 

TOM

m7

TOM

m6

TOM

m5

TOM

m4

TOM

m3 

0 

TOM

m1 

0 

 

TOM

mn 

Control of timer output mode of channel n 

0 

Master channel output mode (to produce toggle output by timer interrupt request signal (INTTMmn)) 

1 

Slave channel output mode (output is set by the timer interrupt request signal (INTTMmn) of the master 

channel, and reset by the timer interrupt request signal (INTTM0p) of the slave channel) 

 

 

Remark  m: Unit number (m = 0)  

 

n: Channel number 

n = 0 to 7 (n = 0, 2, 4, 6 for master channel) 

 

p: Slave channel number  

n < p 

≤ 7 

(For details of the relation between the master channel and slave channel, see 6.4.1  Basic rules of 

simultaneous channel operation function.)