Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  6   TIMER  ARRAY  UNIT 

R01UH0305EJ0200  Rev.2.00 

 

 

269  

Jul 04, 2013 

 

By using two channels as a set, a one-shot pulse having any delay pulse width can be generated from the signal input 

to the TImn pin. 

The delay time and pulse width can be calculated by the following expressions. 

 

Delay time = {Set value of TDRmn (master) + 2} 

× Count clock period 

Pulse width = {Set value of TDRmp (slave)} 

× Count clock period 

 

The master channel operates in the one-count mode and counts the delays.  Timer count register mn (TCRmn) of the 

master channel starts operating upon start trigger detection and loads the value of timer data register mn (TDRmn).

 

  

The TCRmn register counts down from the value of the TDRmn register it has loaded, in synchronization with the count 

clock.  When TCRmn = 0000H, it outputs INTTMmn and stops counting until the next start trigger is detected. 

The slave channel operates in the one-count mode and counts the pulse width.  The TCRmp register of the slave 

channel starts operation using INTTMmn of the master channel as a start trigger, and loads the value of the TDRmp 

register.  The TCRmp register counts down from the value of The TDRmp register it has loaded, in synchronization with 

the count value.  When count value = 0000H, it outputs INTTMmp and stops counting until the next start trigger (INTTMmn 

of the master channel) is detected.  The output level of TOmp becomes active one count clock after generation of 

INTTMmn from the master channel, and inactive when TCRmp = 0000H. 

Instead of using the TImn pin input, a one-shot pulse can also be output using the software operation (TSmn = 1) as a 

start trigger. 

 

 

Remark  m: Unit number (m = 0), n: Channel number (n = 0, 4, 6) 

 

p: Slave channel number (n < p 

≤ 7) 

 

However, timer output pin (TOmp) : p = 1, 3 to 7