Renesas rl78 User Manual

RL78/G1A

CHAPTER 12 SERIAL ARRAY UNIT

R01UH0305EJ0200 Rev.2.00

513

Jul 04, 2013

(4) Processing flow (in continuous transmission mode)

Figure 12-81. Timing Chart of UART Transmission (in Continuous Transmission Mode)

SSmn

SEmn

SDRmn

TxDq pin

INTSTq

TSFmn

P SP

BFFmn

<1>

<2>

<3>

Note

<2>

<3>

<5>

<6>

<3>

<4>

MDmn0

STmn

Transmit data 1

Transmit data 2

Transmit data 3

Shift

Transmit data 1

Transmit data 2

Transmit data 3

Shift operation

Data transmission

Note If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is

1 (valid data is stored in serial data register mn (SDRmn)), the transmit data is overwritten.

Caution The MDmn0 bit of serial mode register mn (SSRmn) can be rewritten even during operation.

However, rewrite it before transfer of the last bit is started, so that it will be rewritten before the

transfer end interrupt of the last transmit data.

Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), q: UART number (q = 0 to 2)

mn = 00, 02, 10

<R>