Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  13   SERIAL  INTERFACE  IICA 

<R> 

The I

2

C bus slave function is a function that generates an interrupt request signal (INTIICA0) when a local address and 

extension code have been received. 

This function makes processing more efficient by preventing unnecessary INTIICA0 signal from occurring when 

addresses do not match. 

When a start condition is detected, wakeup standby mode is set.  This wakeup standby mode is in effect while 

addresses are transmitted due to the possibility that an arbitration loss may change the master device (which has 

generated a start condition) to a slave device. 

To use the wakeup function in the STOP mode, set the WUP0 bit to 1.  Addresses can be received regardless of the 

operation clock.  An interrupt request signal (INTIICA0) is also generated when a local address and extension code have 

been received.  Operation returns to normal operation by using an instruction to clear (0) the WUP0 bit after this interrupt 

has been generated. 

Figure 13-22 shows the flow for setting WUP0 = 1 and Figure 13-23 shows the flow for setting WUP0 = 0 upon an 

address match. 

 

 

Waits for 3 clocks of f

MCK

.

Yes

No

START

WUP0 = 1

Wait

STOP instruction execution

MSTS0 = STD0 = EXC0 = COI0 =0?

 

R01UH0305EJ0200  Rev.2.00 

 

 

601  

Jul 04, 2013