Renesas rl78 User Manual

RL78/G1A

CHAPTER 14 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR

14.2.3 Multiplication/division data register C (MDCL, MDCH)

The MDCH and MDCL registers are used to store the accumulated result while in the multiply-accumulator mode or the

remainder of the operation result while in the division mode. These registers are not used while in the multiplication mode.

The MDCH and MDCL registers can be set by a 16-bit manipulation instruction.

Reset signal generation clears these registers to 0000H.

Figure 14-4. Format of Multiplication/Division Data Register C (MDCH, MDCL)

Address: F00E0H, F00E1H, F00E2H, F00E3H After reset: 0000H, 0000H R/W

F00E3H

F00E2H

MDCH

F00E1H

F00E0H

MDCL

Symbol

Cautions 1. The MDCH and MDCL registers values read during division operation processing (when the

multiplication/division control register (MDUC) value is 81H or C1H) will not be guaranteed.

During

multiply-accumulator

processing, do not use software to rewrite the values of the MDCH

and MDCL registers. If this is done, the operation result will be undefined.

3. The data is in the two's complement format in the multiply-accumulator mode (signed).

Table 14-4. Functions of MDCH and MDCL Registers During Operation Execution

Operation Mode

Setting

Operation Result

Multiplication mode (unsigned or

signed)

−

Multiply-accumulator mode

(unsigned)

MDCH: Initial accumulated value (unsigned)

(higher 16 bits)

MDCL: Initial accumulated value (unsigned)

(lower 16 bits)

MDCH: accumulated value (unsigned)

(higher 16 bits)

MDCL: accumulated value (unsigned)

(lower 16 bits)

Multiply-accumulator mode

(signed)

MDCH: Initial accumulated value (signed)

(higher 16 bits)

MDCL: Initial accumulated value (signed)

(lower 16 bits)

MDCH: accumulated value (signed)

(higher 16 bits)

MDCL: accumulated value (signed)

(lower 16 bits)

Division mode (unsigned)

−

MDCH: Remainder (unsigned)

(higher 16 bits)

MDCL: Remainder (unsigned)

(lower 16 bits)

R01UH0305EJ0200 Rev.2.00

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Jul 04, 2013