Avaya 03-300430 User Manual
TDM-CLK (TDM Bus Clock)
Issue 1 June 2005
2265
TDM Bus Clock Parameter Update Test (#151)
This test updates the following internal parameters on the IPSI or Tone-Clock circuit pack:
●
Disables in-line duplication status messages.
●
S8700 MC
: Disable in-line subrate frame maintenance messages (TN768, TN780 only).
●
S8700 MC
: Sets the PPM threshold at 60 PPM for TN768 and TN780.
Sets the PPM threshold at 85 PPM for TN2182 and TN2312.
●
Enables PPM threshold switching.
●
Sets the number of slips to trigger loss of signal - currently 30 per 5-millisecond period.
●
Enables the on-board synchronization switching algorithm (see above).
●
Enables holdover operation (TN2182 and TN2312 only).
This is not a test. It always passes without identifying or reporting any IPSI or Tone-Clock circuit
pack errors.
pack errors.
PASS
The IPSI or Processor/Tone-Clock circuit pack does not detect timing any
PPM errors. This indicates that the external synchronization timing source is
valid or that the system synchronization reference is an IPSI or Processor/
Tone-Clock circuit pack. Use status synchronization to verify that the
desired synchronization reference is providing timing for the system.
Table 810: Test #150 TDM bus Clock PPM Inquiry Test (continued)
Error
Code
Code
Test
Result
Result
Description / Recommendation
2 of 2
Table 811: Test #151 TDM Bus Clock Parameter Update Test
Error
Code
Code
Test
Result
Result
Description / Recommendation
ABRT
Internal system error
1. Retry the command at 1-minute intervals up to 5 times.
FAIL
Internal system error
1. Retry the command at 1-minute intervals up to 5 times.
PASS
The IPSI or Processor/Tone-Clock circuit pack parameters have been
successfully updated.