Avaya 03-300430 User Manual

This test is destructive.
The CPE Loop-Back Jack (CLJ-LB) test causes a loopback at the CPE Loop-Back Jack and 
tests the building wiring connection between the UDS1-BD DS1 board and the CPE Loop-Back 
Jack.
The test is highly destructive and can only be initiated by test ds1-loop location 
cpe-loopback-jack-test-begin [number-of-bits bit-pattern]. The technician 

has the choice of entering a loopback activation code on the command line or using the default 
code 0x47F.
Each trunk or port on the UDS1 Interface circuit pack must be busied out using  busyout 
board location before running the CPE Loop-Back Jack test.
The CPE Loop-Back Jack test has the UDS1 Interface circuit pack transmit a loopback 
activation code to the CPE Loop-Back Jack, waits up to 10 seconds for return of the code to 
verify the loopback has been established, transmits a framed 3-in-24 test pattern, begins 
counting bit errors in the received test pattern, and returns a PASS result to indicate that the 
pattern was successfully sent. If the loopback is not established within the 10 seconds, the test 
returns FAIL or ABRT.

0

NO

BOARD

The test could not relate the internal ID to the port (no board). This could 
be due to incorrect translations, no board is inserted, an incorrect board is 
inserted, or an insane board is inserted.

1. Verify that the board’s translations are correct. Execute add ds1 

location to administer the UDS1 interface if it is not already 

administered.

2. If the board was already administered correctly, check the error log to 

determine whether the board is hyperactive. If so, the board was shut 
down. Reseating the board will re-initialize it.

3. If the board was found to be correctly inserted in step 1, then enter 

busyout board location.

4. Enter reset board location.
5. Enter release board location.
6. Enter test board location long.

This should re-establish the linkage between the internal ID and the port.

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