Avaya 03-300430 User Manual

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Communication Manager Maintenance-Object Repair Procedures
706 Maintenance Procedures for Avaya Communication Manager 3.0, Media Gateways and Servers
 
Receive FIFO Overflow Error Counter Test (#625)
This test reads and clears the BRI port’s Receive FIFO Overflow error counter maintained on 
the BRI-LINE circuit pack.  This counter is incremented by the circuit pack when it detects an 
overflow of its receive buffers.  The test passes if the value of the counter is 0 (that is, the error 
is cleared).  If the counter is non-zero, the test fails, and the value of the counter is displayed in 
the Error Code field.
This error can occur if signaling frames are being received from the packet bus at a rate 
sufficient to overflow the receive buffers on the circuit pack for a port OR if a hardware fault is 
causing the receive buffers not to be emptied properly by the circuit pack.  This test is useful for 
verifying the repair of the problem.
Table 238: Test #625 Receive FIFO Overflow Error Counter Test 
Error 
Code
Test 
Result
Description / Recommendation
2000
ABRT
Response to the test was not received from the circuit pack within the 
allowable time period.
1. If the test aborts repeatedly up to five times, reset the circuit pack via  
busyout board location and reset board location.
2. If the test aborts again, replace the circuit pack.
2012
ABRT
Internal system error.
2100
ABRT
Could not allocate the necessary system resources to run this test.
1. Retry the command at 1-minute intervals up to 5 times.
2. If the test continues to fail, escalate the problem.
value
FAIL
The BRI-LINE circuit pack is still detecting errors of this type.  The Error 
Code field contains the value of this counter.
1. Retry the command at 1-minute intervals up to 5 times.
2. If the test continues to fail, run the long test sequence, and pay 
particular attention to the Loop Around tests (#618 and #619).  See the 
repair procedures for the executed test if it fails.  Otherwise, go to the 
next step.
3. Replace the circuit pack.
PASS
The Receive FIFO Overflow error counter was read correctly and has a 
value of 0.