Fujitsu FR81S User Manual
CHAPTER 26: 16-BIT INPUT CAPTURE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : 16-BIT INPUT CAPTURE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
4.1.1. Input Capture Data Register : IPCP0 to IPCP3
This section explains registers of the 16-bit input capture.
An input capture data register (IPCP) retains the count value of the free-run timer at the time of detection of
an effective edge of the input waveform.
IPCP0: Address 127C
H
(Access: Half-word, Word)
IPCP1: Address 127E
H
(Access: Half-word, Word)
IPCP2: Address 1284
H
(Access: Half-word, Word)
IPCP3: Address 1286
H
(Access: Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
CP15
CP14
CP13
CP12
CP11
CP10
CP09
CP08
Initial value
0
0
0
0
0
0
0
0
Attribute
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
CP07
CP06
CP05
CP04
CP03
CP02
CP01
CP00
Initial value
0
0
0
0
0
0
0
0
Attribute
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
[bit15 to bit0] CP15 to CP00: Free-run timer value
CP15 to CP00
Function
Free-run timer value
⋅
This register is used to store a free-run timer value at the time of detection of an effective edge of the
corresponding external pin input waveform.
⋅
The free-run timer value in the above explanation represents the operating state of a free-run timer for
which the input capture has been selected.
Note:
When accessing this register, use a half-word or word access instruction. No data can be written to this
register.
MB91520 Series
MN705-00010-1v0-E
997