Fujitsu FR81S User Manual
CHAPTER 36: EXTERNAL BUS INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
11
[bit 31 to bit8] Reserved
Always write "0" to these bits.
[bit7, bit6] DBW[1:0] (Data Bus Width) : Data Bus Width
These bits set the data bus width.
DBW[1:0] Data Bus Width Positions of bits used (D31 to D16)
00
8-bit
D[31:24]
01
16-bit
D[31:16]
10
Reserved (32-bit)
-
11
Reserved (32-bit)
-
In this series, 32-bit data bus width is not supported.
The initial value for ACR0 is "01". The initial value other than ACR0 is undefined.
[bit5, bit4] Reserved
Always write "0" to these bits.
[bit3] ADTY (ADdress output TYpe) : Address Type
This bit sets the address output type.
ADTY
Description
0
Normal output
1
During 16-bit addressing, addresses are shifted by 1 bit and output.
See "5.6 Address Information" for details.
The initial value for ACR0 is "00", and for not ASR is undefined.
[bit2] BSTY (BuS TYpe) : Bus Type
This bit sets the bus type.
BSTY
Description
0
Split address/data bus
1
Multiplexed address/data bus
The initial value for ACR0 is "00", and for not ASR is undefined.
[bit1, bit0] Reserved
Always write "0" to these bits.
MB91520 Series
MN705-00010-1v0-E
1210