Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
107
[bit3] LBSERIE: LIN bus error interrupt enable bit
This bit enables/disables the LIN bus error interrupt request output to the CPU.
When the LBSERIE bit and the LAMESR:LBSER bits are set to "1", the reception interrupt request is
outputted.
LBSERIE
LIN bus error interrupt enable bit
0
Disable
1
Enable
[bit2] LCSCIE: LIN checksum arithmetic operations completion interrupt enable bit
This bit enables/disables the LIN checksum arithmetic operations completion interrupt request output to the
CPU.
When the LCSCIE bit and the LAMSR:LCSC bits are set to "1", the status interrupt request is outputted.
LCSCIE
LIN checksum operations completion interrupt
enable bit
0
Disable
1
Enable
[bit1] Reserved bit
This is a reserved bit. The read value is "0." Be sure to write "0" to this bit.
[bit0] LAHCIE: LIN automatic header completion interrupt enable bit
This bit enables/disables the LIN automatic header completion interrupt request output to the CPU.
When the LCSCIE bit and the LAMSR:LAHC bits are set to "1", the status interrupt request is outputted.
LAHCIE
LIN automatic header transmission completion
interrupt enable bit
0
Disable
1
Enable
MB91520 Series
MN705-00010-1v0-E
1420