Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
5. Operation of UART
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
158
5.2.9.
Data Signaling Method
⋅
The INV bit setting of the extended communication control register enables you to select the NRZ (Non
Return to Zero) signaling method (ESCR:INV=0) or the inverted NRZ signaling method (ESCR:INV=1).
Figure 5-9 NRZ (Non Return to Zero) Signaling Method and Inverted NRZ Signaling Method
SIN (NRZ)
INV = 0
SIN (inverted
NRZ)
INV = 1
SOT (inverted
NRZ)
INV = 1
SOT (NRZ)
INV = 0
ST D0 D1 D2 D3 D4 D5 D6 D7 SP
ST D0 D1 D2 D3 D4 D5 D6 D7 SP
ST D0 D1 D2 D3 D4 D5 D6 D7 SP
ST D0 D1 D2 D3 D4 D5 D6 D7 SP
MB91520 Series
MN705-00010-1v0-E
1471