Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
5. Operation of UART
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
177
Figure 5-23 Example of Flowchart of Master-Slave Communications
FIFO Not Used
（
Master CPU）
Start
Operating mode setting
(setting to mode 1)
Sets SIN pin to serial
data input
Sets SOT pin to serial
data output
7 or 8 data bit setting
1 or 2 stop bit setting
No
No
Sets “1” to D8 bit
Sends slave address
Communication with
slave CPU
Sets “0” to D8 bit
Communication
completed?
Communication
with other slave
CPUs
Disables transmission/
reception operation
End
Yes
Yes
（
Slave CPU）
Start
Sets SIN pin to serial
data input
7 or 8 data bit setting
1 or 2 stop bit setting
Enables transmission/
reception operation
Reception byte
D8 bit = 1
Slave address
match
Communication with
master CPU
Communication
complete?
No
No
Yes
Yes
Yes
No
Sets SOT pin to serial
data output
Operating mode setting
(setting to mode 1)
Enables transmission/
reception operation
MB91520 Series
MN705-00010-1v0-E
1490