Fujitsu FR81S User Manual
CHAPTER 41: CAN
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
22
4.2.3. CAN Error Counter : ERRCNT
The bit configuration of the CAN error counter is shown.
Indicates reception error passive display, reception error counter and transmission error counter.
CAN Error Counter Register (upper byte): Address Base + 04
H
(Access: Byte,
Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
RP
REC[6:0]
Initial value
0
0
0
0
0
0
0
0
Attribute R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
CAN Error Counter Register (lower byte): Address Base + 05
H
(Access: Byte,
Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
TEC[7:0]
Initial value
0
0
0
0
0
0
0
0
Attribute R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
[bit15]: Reception error passive display
RP
Function
0
The reception error counter indicates that it is not the error passive state. [Initial value]
1
The reception error counter indicates that the error passive state that is defined in the CAN
specification has been reached.
[bit14 to bit8] : Reception error counter
Reception error counter value. The range for the reception error counter values is 0 to 127.
When the reception error counter is greater than or equal to 128, "1" is set to the RP bit and the reception
error counter is not updated.
Example:
When RP=0 and REC[6:0]=127 is incremented by 8 for reception error, the result is RP=1 and REC[6:0]=127.
When RP=0 and REC[6:0]=126 is incremented by 8 for reception error, the result is RP=1 and REC[6:0]=126.
When RP=0 and REC[6:0]=119 is incremented by 8 for reception error, the result is RP=0 and REC[6:0]=127.
When RP=1, REC[6:0]=126 and reception has ended successfully, the result is RP=0 and REC[6:0]=125.
When RP=0 and REC[6:0]=126 is incremented by 8 for reception error, the result is RP=1 and REC[6:0]=126.
When RP=0 and REC[6:0]=119 is incremented by 8 for reception error, the result is RP=0 and REC[6:0]=127.
When RP=1, REC[6:0]=126 and reception has ended successfully, the result is RP=0 and REC[6:0]=125.
[bit7 to bit0] : Transmission error counter
Transmission error counter value. The range for the transmission error counter values is 0 to 255.
When the transmission error counter is greater than or equal to 256, "1" is set to the Init bit of the CAN
control register and the transmission error counter is not updated.
Example:
When Init=0 and TEC[7:0]=255 is incremented by 8 for transmission error, the result is Init=1 and TEC[7:0]=255.
When Init=0 and TEC[7:0]=254 is incremented by 8 for transmission error, the result is Init=1 and TEC[7:0]=254.
When Init=0 and TEC[7:0]=247 is incremented by 8 for transmission error, the result is Init=0 and TEC[7:0]=255.
When Init=0 and TEC[7:0]=254 is incremented by 8 for transmission error, the result is Init=1 and TEC[7:0]=254.
When Init=0 and TEC[7:0]=247 is incremented by 8 for transmission error, the result is Init=0 and TEC[7:0]=255.
MB91520 Series
MN705-00010-1v0-E
1715