Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
32
Notes:
Since the activation factor select bit changes immediately when the bits are rewritten, change these bits
while the current target and target activation factor are inactive and the A/D conversion is not being
requested (ADTCS:BUSY=1).
Please set these bits including ADTECS.STS2 as software activation ("000B"), and set a corresponding
bit of ADTSE (activation channel) to the software activation disable (ADT bit =0) when A/D conversion
is not being requested.
Please confirm the 16-bit free-run timer has stopped whenever the A/D activation factor select bit is set.
[bit10] RPT : Repeat conversion select bit
RPT
Function
0
Single conversion
1
Repeat conversion
This bit specifies an A/D conversion mode.
To select single conversion mode, set this bit to "0". In this mode, one activation factor leads to the
issuance of one A/D conversion request. The A/D conversion is performed once.
To select repeat conversion mode, set this bit to "1". In this mode, one activation factor leads to a
sequence of A/D conversion requests. The A/D conversion is performed repeatedly until single
conversion mode is selected.
[bit9] PRT : A/D data register protection enable bit
PRT
Function
0
Protection disabled
1
Protection enabled
If this bit is set to "1", the A/D data register is protected against being overwritten. The protection
function works if the activation factor is not compare-match activation (STS1, STS0 = 11).
After conversion data is stored in the A/D data register, the next activation request will be masked to
protect the A/D data register against being overwritten until the factor specified by the A/D data register
protection clear select bit (PRTS) occurs.
Note:
Please set the A/D data register protection enable bit before operating the A/D conversion.
Please do not change the A/D data register protection enable bit with the A/D conversion is requested or the
A/D data register protected.
[bit8] PRTS : A/D data register protection clear select bit
PRTS
Function
0
Data read and interrupt flag clear
1
Data read
This bit selects a condition for clearing the activation request mask if the A/D data register protection
function is enabled (PRT=1).
If this bit is set to "0", the A/D data register (ADTCD) is read and the interrupt request flag bit (INT)
become the protection release conditions (random order).
If this bit is set to "1", the A/D data register (ADTCD) become the protection release conditions.
MB91520 Series
MN705-00010-1v0-E
1835