Fujitsu FR81S User Manual
CHAPTER 5: CLOCK
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CLOCK
FUJITSU SEMICONDUCTOR CONFIDENTIAL
10
4. Registers
This section explains registers of the clock.
Table 4-1 Registers Map
Address
Registers
Register function
+0
+1
+2
+3
0x0488
DIVR0
DIVR1
DIVR2
Reserved
Division Configuration Register 0
Division Configuration Register 1
Division Configuration Register 2
Division Configuration Register 1
Division Configuration Register 2
0x0510
CSELR
CMONR
MTMCR
STMCR
Clock Source Configuration Register
Clock Source Monitor Register
Main Timer Control Register
Sub Timer Control Register
Clock Source Monitor Register
Main Timer Control Register
Sub Timer Control Register
0x0514
PLLCR
CSTBR
PTMCR
PLL Setting Register
Oscillation Stabilization Wait Setting
Register
PLL Oscillation Stabilization Wait Timer
Control Register
Oscillation Stabilization Wait Setting
Register
PLL Oscillation Stabilization Wait Timer
Control Register
0x0520 CCPSSELR
Reserved
Reserved
CCPSDIVR
PLL/SSCG Clock Selection Register
PLL/SSCG Output Clock Division Setting
Register
PLL/SSCG Output Clock Division Setting
Register
0x0524
Reserved
CCPLLFBR CCSSFBR0 CCSSFBR1
PLL Feedback Division Setting register
SSCG Feedback Division Setting register 0
SSCG Feedback Division Setting register 1
SSCG Feedback Division Setting register 0
SSCG Feedback Division Setting register 1
0x0528
Reserved
CCSSCCR0
CCSSCCR1
SSCG configuration setting register 0
SSCG configuration setting register 1
SSCG configuration setting register 1
0x052C
Reserved CCCGRCR0 CCCGRCR1 CCCGRCR2
Clock Gear Configuration setting Register 0
Clock Gear Configuration setting Register 1
Clock Gear Configuration setting Register 2
Clock Gear Configuration setting Register 1
Clock Gear Configuration setting Register 2
0x0530 CCRTSELR
Reserved CCPMUCR0 CCPMUCR1
RTC/PMU Clock Selection Register
PMU Clock Division Register 0
PMU Clock Division Register 1
PMU Clock Division Register 0
PMU Clock Division Register 1
0x0534
Reserved
Reserved
Reserved
Reserved
Reserved
0x0538
Reserved
Reserved
Reserved
Reserved
Reserved
0x053C
Reserved
Reserved
Reserved
Reserved
Reserved
0x1000
SACR
PICD
Reserved
Reserved
Sync/Async Control Register
Peripheral Interface Clock Divider
Peripheral Interface Clock Divider
MB91520 Series
MN705-00010-1v0-E
171