Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
32
Address
Address offset value / Register name
Block
+0
+1
+2
+3
0015D4
H
to
00174C
H
―
―
―
―
Reserved
001750
H
SCR0/(IBCR0)[R/W]
B,H,W
0--00000
SMR0[R/W]
B,H,W
000-00-0
SSR0[R/W]
B,H,W
0-000011
ESCR0/(IBSR0)[R/W]
B,H,W
00000000
Multi-UART0
*1 Byte access is
possible only for
access to lower 8
bits.
*2 Reserved
because I
2
C mode
is not set
immediately after
reset.
*3 Reserved
because CSIO
mode is not set
immediately after
reset.
*4 Reserved
because LIN2.1
mode is not set
immediately after
reset.
001754
H
― /(RDR10/(TDR10))[R/W] H,W
-------- -------- *3
RDR00/(TDR00)[R/W] B,H,W
-------0 00000000 *1
001758
H
SACSR0[R/W] B,H,W
0----000 00000000
STMR0[R] B,H,W
00000000 00000000
00175C
H
STMCR0[R/W] B,H,W
00000000 00000000
― /(SCSCR0/SFUR0)[R/W] B,H,W
-------- -------- *3 *4
001760
H
― /(SCSTR30)/
(LAMSR0)
[R/W] B,H,W
-------- *3
― /(SCSTR20)/
(LAMCR0)
[R/W] B,H,W
-------- *3
― /(SCSTR10)
/(SFLR10)
[R/W] B,H,W
-------- *3
― /(SCSTR00)/
(SFLR00)
[R/W] B,H,W
-------- *3
001764
H
―
― /(SCSFR20)
[R/W] B,H,W
-------- *3
― /(SCSFR10)
[R/W] B,H,W
-------- *3
― /(SCSFR00)
[R/W] B,H,W
-------- *3
001768
H
―/(TBYTE30)/
(LAMESR0)
[R/W] B,H,W
-------- *3
―/(TBYTE20)
/(LAMERT0)
[R/W] B,H,W
-------- *3
―/(TBYTE10)/
(LAMIER0)
[R/W] B,H,W
-------- *3
TBYTE00/(LAMRID0)
/
(LAMTID0)
[R/W] B,H,W
00000000
00176C
H
BGR0[R/W] H, W
00000000 00000000
― /(ISMK0)
[R/W] B,H,W
-------- *2
― /(ISBA0)
[R/W] B,H,W
-------- *2
001770
H
FCR10[R/W]
B,H,W
---00100
FCR00[R/W]
B,H,W
-0000000
FBYTE0[R/W] B,H,W
00000000 00000000
001774
H
FTICR0[R/W] B,H,W
00000000 00000000
―
―
MB91520 Series
MN705-00010-1v0-E
2242