Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
39
Address
Address offset value / Register name
Block
+0
+1
+2
+3
001868
H
SCR7/(IBCR7) [R/W]
B,H,W
0--00000
SMR7[R/W] B,H,W
000-00-0
SSR7[R/W] B,H,W
0-000011
ESCR7/(IBSR7)[R/W]
B,H,W
00000000
Multi-UART7
*1 Byte access is
possible only for
access to lower 8
bits.
*2 Reserved
because I
2
C mode
is not set
immediately after
reset.
*3 Reserved
because CSIO
mode is not set
immediately after
reset.
*4 Reserved
because LIN2.1
mode is not set
immediately after
reset.
00186C
H
― /(RDR17/(TDR17))[R/W] H,W
-------- -------- *3
RDR07/(TDR07)[R/W] B,H,W
-------0 00000000 *1
001870
H
SACSR7[R/W] B,H,W
0----000 00000000
STMR7[R] B,H,W
00000000 00000000
001874
H
STMCR7[R/W] B,H,W
00000000 00000000
― /(SCSCR7/SFUR7)[R/W] B,H,W
-------- -------- *3 *4
001878
H
― /(SCSTR37)/
(LAMSR7)
[R/W] B,H,W
-------- *3
― /(SCSTR27)/
(LAMCR7)
[R/W] B,H,W
-------- *3
― /(SCSTR17)/
(SFLR17)
[R/W] B,H,W
-------- *3
― /(SCSTR07)/
(SFLR07)
[R/W] B,H,W
-------- *3
00187C
H
―
― /(SCSFR27)
[R/W] B,H,W
-------- *3
― /(SCSFR17)
[R/W] B,H,W
-------- *3
― /(SCSFR07)
[R/W] B,H,W
-------- *3
001880
H
―/(TBYTE37)/
(LAMESR7)
[R/W] B,H,W
-------- *3
―/(TBYTE27)/
(LAMERT7)
[R/W] B,H,W
-------- *3
―/(TBYTE17)/
(LAMIER7)
[R/W] B,H,W
-------- *3
TBYTE07/(LAMRID7)
/
(LAMTID7)
[R/W] B,H,W
00000000
001884
H
BGR7[R/W] H, W
00000000 00000000
― /(ISMK7)[R/W]
B,H,W
-------- *2
― /(ISBA7)[R/W]
B,H,W
-------- *2
001888
H
FCR17[R/W]
B,H,W
---00100
FCR07[R/W]
B,H,W
-0000000
FBYTE7[R/W] B,H,W
00000000 00000000
00188C
H
FTICR7[R/W] B,H,W
00000000 00000000
―
―
MB91520 Series
MN705-00010-1v0-E
2249