Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
41
Address
Address offset value / Register name
Block
+0
+1
+2
+3
0018B8
H
SCR9/(IBCR9) [R/W]
B,H,W
0--00000
SMR9[R/W] B,H,W
000-00-0
SSR9[R/W] B,H,W
0-000011
ESCR9/(IBSR9)[R/W]
B,H,W
00000000
Multi-UART9
*1 Byte access is
possible only for
access to lower 8
bits.
*2 Reserved
because I
2
C mode
is not set
immediately after
reset.
*3 Reserved
because CSIO
mode is not set
immediately after
reset.
*4 Reserved
because LIN2.1
mode is not set
immediately after
reset.
0018BC
H
― /(RDR19/(TDR19))[R/W] H,W
-------- -------- *3
RDR09/(TDR09)[R/W] B,H,W
-------0 00000000 *1
0018C0
H
SACSR9[R/W] B,H,W
0----000 00000000
STMR9[R] B,H,W
00000000 00000000
0018C4
H
STMCR9[R/W] B,H,W
00000000 00000000
― /(SCSCR9/SFUR9)[R/W] B,H,W
-------- -------- *3 *4
0018C8
H
― /(SCSTR39)/
(LAMSR9)
[R/W] B,H,W
-------- *3
― /(SCSTR29)/
(LAMCR9)
[R/W] B,H,W
-------- *3
― /(SCSTR19)/
(SFLR19)
[R/W] B,H,W
-------- *3
― /(SCSTR09)/
(SFLR09)
[R/W] B,H,W
-------- *3
0018CC
H
―
― /(SCSFR29)
[R/W] B,H,W
-------- *3
― /(SCSFR19)
[R/W] B,H,W
-------- *3
― /(SCSFR09)
[R/W] B,H,W
-------- *3
0018D0
H
―/(TBYTE39)/
(LAMESR9)
[R/W] B,H,W
-------- *3
―/(TBYTE29)/
(LAMERT9)
[R/W] B,H,W
-------- *3
―/(TBYTE19)/
(LAMIER9)
[R/W] B,H,W
-------- *3
TBYTE09/(LAMRID9)
/
(LAMTID9)
[R/W] B,H,W
00000000
0018D4
H
BGR9[R/W] H, W
00000000 00000000
― /(ISMK9)[R/W]
B,H,W
-------- *2
― /(ISBA9)[R/W]
B,H,W
-------- *2
0018D8
H
FCR19[R/W]
B,H,W
---00100
FCR09[R/W]
B,H,W
-0000000
FBYTE9[R/W] B,H,W
00000000 00000000
0018DC
H
FTICR9[R/W] B,H,W
00000000 00000000
―
―
MB91520 Series
MN705-00010-1v0-E
2251