Fujitsu FR81S User Manual
FUJITSU SEMICONDUCTOR LIMITED
CONTENTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
2.
F
EATURES
................................................................................................................................. 1797
3.
C
ONFIGURATION
........................................................................................................................ 1798
4.
R
EGISTERS
............................................................................................................................... 1799
4.1.
DA Control Register : DACR ........................................................................................... 1800
4.2.
DA Data Register : DADR ............................................................................................... 1801
5.
O
PERATION
............................................................................................................................... 1802
6.
N
OTE
........................................................................................................................................ 1803
CHAPTER 44: 12-BIT A/D CONVERTER ........................................................................................ 1805
1.
O
VERVIEW
................................................................................................................................ 1806
2.
F
EATURES
................................................................................................................................. 1807
2.1.
Function of A/D Activation Compare................................................................................ 1808
2.2.
Function of A/D Activation Arbitration .............................................................................. 1810
2.3.
Functions of 12-bit A/D Converter Control ....................................................................... 1811
3.
C
ONFIGURATION
........................................................................................................................ 1812
4.
R
EGISTERS
............................................................................................................................... 1815
4.1.
Register of Analog Input Control ..................................................................................... 1824
4.1.1.
Analog Input Enable Register : ADER ................................................................................................ 1825
4.2.
Register of A/D Activation Compare ................................................................................ 1827
4.2.1.
A/D Software Activation Register: ADTSS0, ADTSS1 ...................................................................... 1828
4.2.2.
A/D Software Activation Channel Select Register : ADTSE0, ADTSE1 ......................................... 1829
4.2.3.
Compare Buffer Register / Compare Register : ADCOMPB0 to ADCOMPB47 / ADCOMP0 to
ADCOMP47 ............................................................................................................................................ 1831
4.2.4.
A/D Activation Trigger Control Status Register : ADTCS0 to ADTCS47 ........................................ 1833
4.2.5.
A/D Data Register : ADTCD0 to ADTCD47 ........................................................................................ 1838
4.2.6.
A/D Activation Trigger Extend Control Register : ADTECS0 to ADTECS47.................................. 1840
4.2.7.
Upper Bound Threshold Setting Register : ADRCUT0 to ADRCUT7 ............................................. 1843
4.2.8.
Lower Bound Threshold Setting Register : ADRCLT0 to ADRCLT7 ............................................... 1844
4.2.9.
Range Compare Control Status Register: ADRCCS0 to ADRCCS47 ............................................ 1845
4.2.10.
Range Compare Threshold Over Flag Register : ADRCOT0, ADRCOT1 ..................................... 1848
4.2.11.
Range Compare Flag Register : ADRCIF0, ADRCIF1 ..................................................................... 1850
4.2.12.
Scan Conversion Control Status Register : ADSCANS0, ADSCANS1 .......................................... 1853
4.2.13.
Activation Channel Conversion Count Setting Register : ADNCS0 to ADNCS23 ........................ 1855
4.2.14.
Data Protection Status Flag Register : ADPRTF0, ADPRTF1 ......................................................... 1857
4.2.15.
Activation Channel Conversion Completion Flag Register : ADEOCF0, ADEOCF1 ................... 1859
4.3.
Register of 12-BIT A/D Converter Control ....................................................................... 1861
4.3.1.
A/D Control Status Register: ADCS0, ADCS1 ................................................................................... 1862
4.3.2.
A/D Channel Status Register : ADCH ................................................................................................. 1863
4.3.3.
A/D Mode Setting Register : ADMD .................................................................................................... 1864
4.3.4.
A/D Sampling Time Setting Per Channel Register : ADSTPCS ...................................................... 1867
5.
O
PERATION
............................................................................................................................... 1869
5.1.
Interrupt of A/D activation compare ................................................................................. 1870
5.1.1.
A/D conversion completion interrupt ................................................................................................... 1871
5.1.2.
Scan conversion completion interrupt by conversion count specification ..................................... 1872
5.1.3.
Range comparison interrupt ................................................................................................................. 1873
5.2.
A/D activation compare operation ................................................................................... 1874
5.2.1.
A/D activation ......................................................................................................................................... 1875
5.2.2.
A/D activation enable ............................................................................................................................ 1876
5.2.3.
Free-run timer input ............................................................................................................................... 1877
5.2.4.
Analog channel select ........................................................................................................................... 1878
5.2.5.
Software activation ................................................................................................................................ 1879
5.2.6.
External trigger activation ..................................................................................................................... 1880
5.2.7.
Reload timer activation ......................................................................................................................... 1881
5.2.8.
Compare match activation .................................................................................................................... 1882
5.2.9.
PPG activation ....................................................................................................................................... 1888
5.2.10.
Activation request mode ....................................................................................................................... 1889
5.2.11.
A/D conversion data .............................................................................................................................. 1890
5.2.12.
Protection function ................................................................................................................................. 1891
5.2.13.
Scan conversion mode ......................................................................................................................... 1892
MB91520 Series
MN705-00010-1v0-E
(31)