Fujitsu FR81S User Manual

CHAPTER 13: EXTERNAL INTERRUPT INPUT

5. Operation

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : EXTERNAL INTERRUPT INPUT

FUJITSU SEMICONDUCTOR CONFIDENTIAL

5. Operation

This section explains the operation of the external interrupt input.

Figure 5-1 Operation Diagram

(1)

External interrupt signal (INT) input

(2)

Detects interrupt signals (level/edge).

(3)

Generates interrupt requests.

(4)

Clears interrupt requests with the software.

Figure 5-2 Operation of External Interrupt

1. Operation of external interrupt

This module generates the interrupt request signal to the interrupt controller when a request set in the

ELVR register is input in the corresponding pin after setting a request level and the enable register. The

corresponding interrupt will be generated when the interrupt from this resource was found to have the

highest priority in the result for examining the priority in interrupts concurrently occurred in the

interrupt controller.

2. Transition to standby mode

Channels not to be used should be moved to disable state before letting them go into the standby mode.

For the enabled channel, the standby mode automatic input/output blocked feature to the external pin

will also be suppressed. See "CHAPTER: POWER CONSUMPTION CONTROL" for the automatic

input/output blocked feature.

3. Setting procedure of external interrupts

When setting registers which reside in the external interrupt unit, follow the steps shown below:

INT ("H")

(1)

(2)

(3)

(4)

(1)

("L")

INT (rising)

Edge/level detection

Interrupt request (ER)

(falling)

Clears with the software

External interrupt

Interrupt controller

CPU

Factor

ELVR

EIRR

ENIR

ICRyy

ICRxx

ILM

Resource request

CMP

MB91520 Series

MN705-00010-1v0-E

483