Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
66
Figure 5-16 Counting Operation
Note:
If a 16-bit PWM timer activation trigger is detected when counting ends, the value set in the cycle setting
register (BTxPCSR) is loaded to the 16-bit down counter, which begins counting.
Output Waveform
It is the same operation as in reload mode. See "Output Waveform" in "5.5.2 Operation in Reload Mode".
Interrupt Generation Timing
It is the same operation as in reload mode. See "Interrupt Generation Timing" in "5.5.2 Operation in Reload
Mode".
m
n
0
PWM output waveform
: Value of base timer x cycle setting register (BTxPCSR)
: Value of base timer x duty setting register (BTxPDUT)
: Count clock cycle
m
n
T
m
n
0
PWM output waveform
m
n
T
Activation trigger
Counting operation when reactivation is disabled
Counting operation when reactivation is enabled
Rising edge detection
Rising edge detection
Activation trigger is ignored
Reactivate with activation trigger
Activation trigger
= T(n+1) ms
= T(m+1) ms
= T(m+1) ms
: Value of base timer x cycle setting register (BTxPCSR)
: Value of base timer x duty setting register (BTxPDUT)
: Count clock cycle
= T(n+1) ms
= T(m+1) ms
MB91520 Series
MN705-00010-1v0-E
699