Intel D425 AU80610006252AA User Manual

100  

Datasheet  

B/D/F/Type: 0/0/0/PXPEPBAR 

Address Offset: 

50-53h 

Default Value: 

01000000h 

Access: 

 RO; RWO; 

Size: 32 

bits 

First part of a Link Entry which declares an internal link to another Root Complex 
Element. 

 

 

31:24 RO 

01h  Core 

Target Port Number (TPN):  
 Specifies the port number associated with the 
element targeted by this link entry (DMI). The 
target port number is with respect to the 
component that contains this element as 
specified by the target component ID. 

23:16 RWO 

00h  Core 

Target Component ID (TCID):  
Identifies the physical or logical component that 
is targeted by this link entry.   BIOS 

Requirement:  Must be initialized according to 
guidelines in the PCI Express* 
Isochronous/Virtual Channel Support Hardware 
Programming Specification (HPS). 

15:2 RO  0000h Core 

1 RO  0b Core 

Link Type (LTYP):  
Indicates that the link points to memory-
mapped space (for RCRB). The link address 
specifies the 64-bit base address of the target 
RCRB. 

0 RWO  0b Core 

Link Valid (LV):  
0: Link Entry is not valid and will be ignored. 
1: Link Entry specifies a valid link.