Intel D425 AU80610006252AA User Manual

Datasheet 

 101 

B/D/F/Type: 0/0/0/PXPEPBAR 

Address Offset: 

58-5Fh 

Default Value: 

0000000000000000h 

Access: 

 RO; RWO; 

Size: 64 

bits 

Second part of a Link Entry which declares an internal link to another Root Complex 
Element. 

 

 

63:36 RO 0000000h 

Core 

Reserved ():  
Reserved for Link Address high order bits. 

35:12 RWO 000000h Core 

Link Address (LA):  
Memory mapped base address of the RCRB that 
is the target element (DMI) for this link entry. 

11:0 RO  000h Core 

B/D/F/Type: 0/0/0/PXPEPBAR 
Address Offset: 

60-63h 

Default Value: 

02000002h 

Access: 

 RO; RWO; 

Size: 32 

bits 

First part of a Link Entry which declares an internal link to another Root Complex 
Element. 

 

 

31:24 RO 

02h  Core 

Target Port Number (TPN):  
Specifies the port number associated with the 
element targeted by this link entry (PEG). The 
target port number is with respect to the 
component that contains this element as 
specified by the target component ID. 

23:16 RWO 

00h  Core 

Target Component ID (TCID):  
Identifies the physical or logical component that 
is targeted by this link entry. A value of 0 is 
reserved. Component IDs start at 1. This value 
is a mirror of the value in the Component ID 
field of all elements in this component.   BIOS 

Requirement:  Must be initialized according to 
guidelines in the PCI Express* 
Isochronous/Virtual Channel Support Hardware 
Programming Specification (HPS). 

15:2 RO  0000h Core