Intel 2760QM FF8062701065300 User Manual
Product codes
FF8062701065300
Interfaces
18
Datasheet, Volume 1
PCI Express uses packets to communicate information between components. Packets
are formed in the Transaction and Data Link Layers to carry the information from the
transmitting component to the receiving component. As the transmitted packets flow
through the other layers, they are extended with additional information necessary to
handle packets at those layers. At the receiving side, the reverse process occurs and
packets get transformed from their Physical Layer representation to the Data Link
Layer representation and finally (for Transaction Layer Packets) to the form that can be
processed by the Transaction Layer of the receiving device.
are formed in the Transaction and Data Link Layers to carry the information from the
transmitting component to the receiving component. As the transmitted packets flow
through the other layers, they are extended with additional information necessary to
handle packets at those layers. At the receiving side, the reverse process occurs and
packets get transformed from their Physical Layer representation to the Data Link
Layer representation and finally (for Transaction Layer Packets) to the form that can be
processed by the Transaction Layer of the receiving device.
2.2.1.1
Transaction Layer
The upper layer of the PCI Express architecture is the Transaction Layer. The
Transaction Layer's primary responsibility is the assembly and disassembly of
Transaction Layer Packets (TLPs). TLPs are used to communicate transactions, such as
read and write, as well as certain types of events. The Transaction Layer also manages
flow control of TLPs.
Transaction Layer's primary responsibility is the assembly and disassembly of
Transaction Layer Packets (TLPs). TLPs are used to communicate transactions, such as
read and write, as well as certain types of events. The Transaction Layer also manages
flow control of TLPs.
2.2.1.2
Data Link Layer
The middle layer in the PCI Express stack, the Data Link Layer, serves as an
intermediate stage between the Transaction Layer and the Physical Layer.
Responsibilities of Data Link Layer include link management, error detection, and error
correction.
intermediate stage between the Transaction Layer and the Physical Layer.
Responsibilities of Data Link Layer include link management, error detection, and error
correction.
Figure 2-1.
PCI Express* Layering Diagram
Transaction
Data Link
Physical
Logical Sub-Block
Electrical Sub-Block
RX
TX
Transaction
Data Link
Physical
Logical Sub-Block
Electrical Sub-Block
RX
TX
Transaction
Data Link
Physical
Logical Sub-Block
Electrical Sub-Block
RX
TX
Transaction
Data Link
Physical
Logical Sub-Block
Electrical Sub-Block
RX
TX
Figure 2-2.
Packet Flow through the Layers
Framing
Sequence
Number
Header
Date
LCRC
ECRC
Framing
Data Link Layer
Transaction Layer
Physical Layer
Framing
Sequence
Number
Header
Date
LCRC
ECRC
Framing
Data Link Layer
Transaction Layer
Physical Layer