Intel 2760QM FF8062701065300 User Manual
Product codes
FF8062701065300
Introduction
16
Datasheet, Volume 1
1.7
Related Documents
Refer to the following documents for additional information.
§
Unit Interval
Signaling convention that is binary and unidirectional. In this binary signaling, one bit is
sent for every edge of the forwarded clock, whether it be a rising edge or a falling edge. If
a number of edges are collected at instances t
sent for every edge of the forwarded clock, whether it be a rising edge or a falling edge. If
a number of edges are collected at instances t
1
, t
2
, t
n
,...., t
k
then the UI at instance “n” is
defined as:
UI
UI
n
= t
n
– t
n
– 1
V
CC
Processor core power supply
V
SS
Processor ground
VCCD_01, VCCD_23
Power supply for the processor system memory interface. VCCD is the generic term for
VCCD_01, VCCD_23.
VCCD_01, VCCD_23.
x1
Refers to a Link or Port with one Physical Lane
x4
Refers to a Link or Port with four Physical Lanes
x8
Refers to a Link or Port with eight Physical Lanes
x16
Refers to a Link or Port with sixteen Physical Lanes
Table 1-1.
Terminology (Sheet 3 of 3)
Term
Description
Table 1-2.
Reference Documents
Document
Document Number/
Location
Intel
®
Core™ i7 Processor Family for the LGA-2011 Socket Datasheet, Volume 2
326197
Intel
®
Core™ i7 Processor Family for the LGA-2011 Socket Specification Update
326198
Desktop Intel
®
Core™ i7 Processor Family for the LGA-2011 Socket Thermal
Mechanical Specifications and Design Guide
326199
Intel
®
X79 Express Chipset Datasheet
326200
Intel
®
X79 Express Chipset Specification Update
326201
Intel
®
X79 Express Chipset Thermal Mechanical Specifications and Design Guide
326202
Advanced Configuration and Power Interface Specification 3.0
http://www.acpi.info
PCI Local Bus Specification
http://www.pcisig.com/
specifications
specifications
PCI Express* Base Specification
http://www.pcisig.com
System Management Bus (SMBus) Specification
http://smbus.org/
DDR3 SDRAM Specification
http://www.jedec.org
Intel
®
64 and IA-32 Architectures Software Developer's Manuals
•
Volume 1: Basic Architecture
•
Volume 2A: Instruction Set Reference, A-M
•
Volume 2B: Instruction Set Reference, N-Z
•
Volume 3A: System Programming Guide
•
Volume 3B: System Programming Guide
Intel
®
64 and IA-32 Architectures Optimization Reference Manual
http://www.intel.com/p
roducts/processor/man
uals/index.htm
roducts/processor/man
uals/index.htm
Intel
®
Virtualization Technology Specification for Directed I/O Architecture
Specification
http://download.intel.co
m/technology/computin
g/vptech/Intel(r)_VT_fo
r_Direct_IO.pdf
m/technology/computin
g/vptech/Intel(r)_VT_fo
r_Direct_IO.pdf