Intel 2760QM FF8062701065300 User Manual
Product codes
FF8062701065300
Datasheet, Volume 1
61
Electrical Specifications
7.5
DC Specifications
DC specifications are defined at the processor pads, unless otherwise noted.
DC specifications are only valid while meeting the thermal specifications as specified in
the processor Thermal Mechanical Specification and Design Guide (see
DC specifications are only valid while meeting the thermal specifications as specified in
the processor Thermal Mechanical Specification and Design Guide (see
Section 1.7,
“Related Documents”
), clock frequency, and input voltages. Care should be taken to
read all notes associated with each specification.
7.5.1
Voltage and Current Specifications
Notes:
1.
1.
Unless otherwise noted, all specifications in this table apply to all processors. These specifications are
based on pre-silicon characterization and will be updated as further data becomes available.
based on pre-silicon characterization and will be updated as further data becomes available.
2.
Individual processor VID values may be calibrated during manufacturing such that two devices at the same
speed may have different settings.
speed may have different settings.
3.
These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required.
different voltage is required.
4.
The V
CC
voltage specification requirements are measured across the remote sense pin pairs (VCC_SENSE
and VSS_VCC_SENSE) on the processor package. Voltage measurement should be taken with a DC to
100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF
maximum probe capacitance, and 1 M minimum impedance. The maximum length of the ground wire on
the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope
probe.
100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF
maximum probe capacitance, and 1 M minimum impedance. The maximum length of the ground wire on
the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope
probe.
5.
The V
TTA,
and V
TTD
voltage specification requirements are measured across the remote sense pin pairs
(VTTD_SENSE and VSS_VTTD_SENSE) on the processor package. Voltage measurement should be taken
with a DC to 100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a
1.5 pF maximum probe capacitance, and 1 M minimum impedance. The maximum length of the ground
wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the
scope probe.
with a DC to 100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a
1.5 pF maximum probe capacitance, and 1 M minimum impedance. The maximum length of the ground
wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the
scope probe.
6.
The V
SA
voltage specification requirements are measured across the remote sense pin pairs (VSA_SENSE
and VSS_VSA_SENSE) on the processor package. Voltage measurement should be taken with a DC to
100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF
maximum probe capacitance, and 1 M minimum impedance. The maximum length of the ground wire on
the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope
probe.
100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF
maximum probe capacitance, and 1 M minimum impedance. The maximum length of the ground wire on
the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope
probe.
7.
The processor should not be subjected to any static V
CC
level that exceeds the V
CC_MAX
associated with any
particular current. Failure to adhere to this specification can shorten processor lifetime.
8.
Minimum V
CC
and maximum I
CC
are specified at the maximum processor temperature. Refer to the
Thermal Mechanical Specification and Design Guide (see
Section 1.7, “Related Documents”
) for thermal
specifications. I
CC_MAX
is specified at the relative V
CC_MAX
point on the V
CC
load line. The processor is
capable of drawing I
CC_MAX
for up to 10 ms.
Table 7-9.
Voltage Specification
Symbol
Parameter
Voltage
Plane
Min
Typ
Max
Unit
Notes
1
V
CC
VID
V
CC
VID Range
-
0.6
1.35
V
2, 3, 18
V
CC
LL
V
CC
Loadline Slope
V
CC
0.8
m
3, 4, 7, 8,
12, 17
V
CC
TOB
V
CC
Tolerance Band
V
CC
15
mV
3, 4, 7, 8,
12, 17
V
CC
Ripple
V
CC
Ripple
Vcc
5
mV
3, 4, 7, 8,
12, 17
V
CCPLL
PLL Voltage
V
CCPLL
0.955*V
CCPLL_TYP
1.8
1.045*V
CCPLL_TYP
V
10, 11
V
CCD
(
V
CCD_01,
V
CCD_23)
I/O Voltage for DDR3
V
CCD
0.95*V
CCD_TYP
1.5
1.05*V
CCD_TYP
V
11, 14, 15
V
TT (
V
TTA,
VTTD)
V
TT
Uncore Voltage
V
TT
0.957*V
TT_TYP
1.05
1.043*V
TT_TYP
V
3, 5, 9,
11
V
SA_VID
V
SA
VID Range
V
SA
0.6
0.965
1.20
V
2, 3, 13,
18
V
SA
TOB
V
SA
Tolerance Band
(DC+AC+Ripple+Gro
und Noise)
und Noise)
V
SA
64
mV
3, 6, 16,
18