Intel 200 MHz FV8050366200 User Manual

Product codes
FV8050366200
Page of 51
PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY
E
8
5/23/97 10:47 AM    24318502.DOC
INTEL CONFIDENTIAL
(until publication date)
The integration of the MMX pipeline with the integer
pipeline is very similar to that of the floating-point
pipeline. Under some circumstances, two MMX
instructions or one integer and one MMX instruction
can be paired and issued in one clock cycle to
increase throughput.
The enhanced pipeline is described in more detail in
the 
Pentium
®
 Processor Family Developer’s Manual
(Order Number 241428).
1.2.5.
DEEPER WRITE BUFFERS
A pool of four write buffers is now shared between
the dual pipelines to improve memory write
performance.
1.3.
Mobile Pentium
®
 Processor
with MMX™ Technology
Currently, Intel’s Mobile Pentium processor with
MMX technology family consists of three products.
Detailed information on Mobile Pentium processors
with MMX technology based on the enhanced CMOS
process technology is available in the datasheet
Mobile Pentium
®
 Processor with MMX™ Technology
(Order Number 243292). Please reference the
datasheet for correct pinout, mechanical, thermal and
electrical specifications.