Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
215
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.2.36 MSGDAT
MSI Data Register.
14.2.37 MSIMSK
MSI Mask Bit.
14.2.38 MSIPENDING
MSI Pending Bit.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0 (PCIe* Mode)
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x68
Bit
Attr
Default
Description
31:16
RV
-
Reserved. 
15:0
RW
0x0
data:
Refer to the Interrupt Chapter for details of how this field is interpreted by 
IIO hardware. The definition of this field depends on whether interrupt 
remapping is enabled or disabled.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0 (PCIe* Mode)
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x6c
Bit
Attr
Default
Description
31:2
RV
-
Reserved. 
1:0
RW
0x0
mask_bits:
Relevant only when MSI is enabled and used for interrupts generated by the 
root port. For each Mask bit that is set, the PCI Express port is prohibited 
from sending the associated message. When only one message is allocated to 
the root port by software, only mask bit 0 is relevant and used by hardware.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0 (PCIe* Mode)
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x70
Bit
Attr
Default
Description
31:2
RV
-
Reserved. 
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