Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
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The Processor Architecture Overview
26
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
Note that in a 2S configuration, if parallel Intel QPI ports are to be used, Port 2 cannot 
be used in the parallel topology. Only ports 0 and 1 support a parallel topology.
The Intel Xeon processor E7 v2 product family supports 3 Intel QPI interfaces. Ports 0, 
1 must always operate at the same link frequency, and link 2 can operate at its own 
supported link frequency. The supported link frequencies for top SKU processor is 
targeting 6.4, 7.2, and 8.0 GT/s. 
The Ring to Intel QPI sub-module (R3QPI) provides several functions:
• Interface between the Processor Ring and Intel QPI Agent: One of the 
primary attributes of the processor ring is its ability to convey Intel QPI semantics 
with no translation. For example, this architecture enables initiators to 
communicate with a local Home Agent in exactly the same way as a remote Home 
Agent on another processor socket. 
• Intel QPI routing: In order to optimize latency, Intel QPI ports 0, 1 share the 
same processor ring stop. Therefore, an Intel QPI packet might be received on one 
interface and simply forwarded along on the other Intel QPI interface, achieving a 
better average latency over the route-through traffic via port 2. The R3QPI has 
sufficient routing logic to determine if a request, snoop, or response is targeting the 
local socket or if it should be forwarded along to the other interface. 
• Router snoop fanout: The R3QPI supports router snoop fanout which allows 
snoops to be broadcast. This is an important feature for topologies which are not 
fully connected because it reduces the average number of snoops sent over each 
Intel QPI link. Intel Xeon processor E7 v2 product family will support only the 
Snoop Fanout mode, no directed snoops, so router snoop fanout is expected to be 
always enabled.
2.2.5
Home Agent (HA)
The Home Agent is the Intel QPI specification term for the coherent agent responsible 
for guarding the iMC module and handles all the memory read/write requests. The 
Home Agent provides several functions:
• Interface between modular ring and iMC module: Regardless of the memory 
technology, the Home Agent receives the memory read and write requests via the 
modular ring. It checks the memory transaction type, detects and resolves the 
coherent conflict, and finally schedules a corresponding transaction to the iMC 
module. It is also responsible for returning the requested data, certain coherent 
protocol messages, and transaction completion.
• Conflict Manager for Intel QPI transactions: All coherent requests between 
sockets via Intel QPI interface must go through conflict management logic in order 
to ensure the coherent consistency across different sockets. In other words, the 
view of data must be the same across all coherent agents regardless of which 
socket modifies the data. Home Agent is responsible for tracking all requests to a 
given main memory address and ensures that the results are consistent. 
• Memory Access Ordering and Data Consistency Control: The Home Agent 
guarantees the ordering of RAW (Read after Write), WAW (Write after Write) and 
WAR (Write after Read). It ensures the iMC module requirement of no write to the 
memory if there is an outstanding read to the same address.
• Memory RAS features Support: Home Agent manages several memory RAS 
features, for example, demand scrubbing, DDR channel lockstep, memory 
mirroring with fail-over recovery, MCA error reporting and recovery. 
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