Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
364
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.6.22 GENPROTRANGE[1:0]_LIMIT
Generic Protected Memory Range X Limit Address. (X = 1, 0)
14.6.23 GENPROTRANGE2_BASE
Generic Protected Memory Range 2 Base Address.
14.6.24 GENPROTRANGE2_LIMIT
Generic Protected Memory Range 2 Limit Address. 
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0xb8
, 0x128
Bit
Attr
Default
Description
63:51
RV
-
rsvd:
50:16
RW_LB
0x0
limit_address:
[50:16] of generic memory address range that needs to be protected from 
inbound dma accesses. The protected memory range can be anywhere in 
the memory space addressable by the processor. Addresses that fall in this 
range that is, GenProtRange.Base[63:16] <= Address [63:16] <= 
GenProtRange.Limit [63:16], are completer aborted by IIO.
Setting the Protected range base address greater than the limit address 
disables the protected memory region.
Note that this range is orthogonal to Intel
®
VT-d spec defined protected 
address range. This register is programmed once at boot time and does not 
change after that, including any quiesce flows. Since this register provides 
for a generic range, it can be used to protect any system dram region from 
DMA accesses. The expected usage for this range is to abort all PCIe* 
accesses to the PCI-Segments region.
15:0
RV
0x0
rsvd:
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0xc0
Bit
Attr
Default
Description
63:51
RV
-
Reserved.
50:16
RW_LB
0x7ffffffff
base_address:
[50:16] of generic memory address range that needs to be protected from 
inbound dma accesses. The protected memory range can be anywhere in 
the memory space addressable by the processor. Addresses that fall in this 
range that is, GenProtRange.Base[63:16] <= Address [63:16] <= 
GenProtRange.Limit [63:16], are completer aborted by IIO. 
Setting the Protected range base address greater than the limit address 
disables the protected memory region. 
Note that this range is orthogonal to Intel
®
VT-d spec defined protected 
address range. This register is programmed once at boot time and does not 
change after that, including any quiesce flows. 
This region is expected to be used to protect against PAM region accesses 
inbound, but could also be used for other purposes, if needed.
15:0
RV
-
Reserved.
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