Intel J1850 FH8065301455200 User Manual

Product codes
FH8065301455200
Page of 1272
PCU – iLB – Real Time Clock (RTC)
1214
Datasheet
25.6
IO Mapped Registers
The RTC internal registers and RAM is organized as two banks of 128 bytes each, called 
the standard and extended banks. 
Note:
It is not possible to disable the extended bank.
The first 14 bytes of the standard bank contain the RTC time and date information 
along with four registers, A - D, that are used for configuration of the RTC. The 
extended bank contains a full 128 bytes of battery backed SRAM. All data movement 
between the host CPU and the RTC is done through registers mapped to the standard I/
O space.
Note:
Registers reg_RTC_IR_type and reg_RTC_TR_type are used for data movement to and 
from the standard bank. Registers reg_RTC_RIR_type and reg_RTC_RTR_type are used 
for data movement to and from the extended bank. All of these registers have alias I/O 
locations, as indicated in 
.
25.7
Indexed Registers
The RTC contains indexed registers that are accessed via the reg_RTC_IR_type and 
reg_RTC_TR_type registers.
Table 177.
I/O Registers Alias Locations 
Register
Original I/O Location
Alias I/O Location
reg_RTC_IR_type
70h
74h
reg_RTC_TR_type
71h
75h
reg_RTC_RIR_type
72h
76h
reg_RTC_RTR_type
73h
77h
Table 178. RTC Indexed Registers (Sheet 1 of 2)
Start
End
Name
00h
00h
Seconds
01h
01h
Seconds Alarm
02h
02h
Minutes
03h
03h
Minutes Alarm
04h
04h
Hours
05h
05h
Hours Alarm
06h
06h
Day of Week
07h
07h
Day of Month
08h
08h
Month
09h
09h
Year
0Ah
0Ah
Register A