Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
Datasheet
1213
PCU – iLB – Real Time Clock (RTC)
Note:
The GPI strap technique to clear CMOS requires multiple steps to implement. The
system is booted with the jumper in new position, then powered back down. The
jumper is replaced back to the normal position, then the system is rebooted again.
system is booted with the jumper in new position, then powered back down. The
jumper is replaced back to the normal position, then the system is rebooted again.
Warning: Do not implement a jumper on RTC_VCC to clear CMOS.
25.3.4
Clearing Battery Backed RTC Registers
Clearing Battery Backed RTC Registers in a processor based platform can be done by
using a jumper on ILB_RTC_RST#. Implementations should not attempt to clear the
registers by using a jumper to pull RTC_VCC low. A jumper on ILB_RTC_RST# pulled to
ground can be used to reset the state of those Battery Backed RTC Register
configurations bit that reside in the RTC power well to their default state.
using a jumper on ILB_RTC_RST#. Implementations should not attempt to clear the
registers by using a jumper to pull RTC_VCC low. A jumper on ILB_RTC_RST# pulled to
ground can be used to reset the state of those Battery Backed RTC Register
configurations bit that reside in the RTC power well to their default state.
shows which bits are set to their default state when ILB_RTC_RST# is asserted low.
25.4
References
Accessing the Real Time Clock Registers and the NMI Enable Bit:
25.5
Register Map
Table 176. Register Bits Reset by ILB_RTC_RST# Assertion
Register Bit
Bit(s)
Default State
RCRB_GENERAL_CONTROL.TS
1
xb
GEN_PMCON1.PME_B0_S5_DIS
15
0b
GEN_PMCON1.WOL_EN_OVRD
13
0b
GEN_PMCON1.DIS_SLP_X_STRCH_SUS_UP
12
0b
GEN_PMCON1.RTC Reserved
8
0b
GEN_PMCON1.SWSMI_RATESEL
7:6
00b
GEN_PMCON1.S4MAW
5:4
00b
GEN_PMCON1.S4ASE
3
0b
GEN_PMCON1.AG3E
0
0b
PM1_STS_EN.RTC_EN
26
0b
PM1_STS_EN.PWRBTNOR_STS
11
0b
PM1_CNT.SLP_TYP
12:10
0b
GPE0a_EN.PME_B0_EN
13
0b
GPE0a_EN.BATLOW_EN
10
0b