Microchip Technology DM183037 Data Sheet

 2012 Microchip Technology Inc.

DS30575A-page 351

The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D Converters, etc. The MSSP
module can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit™ (I

2

C™)

- Full Master mode
- Slave mode (with general address call)

The I

2

C interface supports the following modes in

hardware:
• Master  mode
• Multi-Master mode
• Slave mode with 5-bit and 7-bit address masking 

(with address masking for both 10-bit and 7-bit 
addressing)

All members of the PIC18F97J94 family have two
MSSP modules, designated as MSSP1 and MSSP2.
Each module operates independently of the other.  

Each MSSP module has four associated control regis-
ters. These include a status register (SSPxSTAT) and
three control registers (SSPxCON1, SSPxCON2, and
SSPxCON3). The use of these registers and their indi-
vidual Configuration bits differ significantly depending
on whether the MSSP module is operated in SPI or I

2

C

mode.
Additional details are provided under the individual
sections. On all PIC18F97J94 family devices, the SPI
DMA capability can only be used in conjunction with
MSSP1. The SPI DMA feature is described in

Throughout this section, generic refer-
ences to an MSSP module in any of its
operating modes may be interpreted as
being equally applicable to MSSP1 or
MSSP2. Register names and module I/O
signals use the generic designator ‘x’ to
indicate the use of a numeral to distin-
guish a particular module when required.
Control bit names are not individuated.

In devices with more than one MSSP
module, it is very important to pay close
attention to SSPxCON register names.
SSP1CON1 and SSP1CON2 control
different operational aspects of the same
module, while SSP1CON1 and SSP2CON1
control the same features for two different
modules. 

The SSPxBUF register cannot be used
with read-modify-write instructions, such
as BCF, COMF, etc. 
To avoid lost data in Master mode, a
read of the SSPxBUF must be per-
formed to clear the Buffer Full (BF)
detect bit (SSPSTAT<0>) between each
transmission.