SMSC LAN1198 Manual De Usuario

LAN9118 Family Programmer Reference Guide

SMSC AN 12.12

21

Revision 1.0 (12-14-09)

 

The driver can verify the existence of the internal PHY by reading the PHY Registers 2 and 3 at PHY
Address 1 and ensuring the contents are 0x0007 and 0xc0c1 respectively.  The existence of external
PHYs is determined by reading the same two PHY Registers at PHY Addresses 0x02 through 0x30.
If values of 0xffff and 0xffff are obtained, there is no PHY at the given PHY Address.   

The driver can reset the internal PHY by writing the Reset bit (15) in the Basic Control Register
(index 0).  This bit is self clearing and can be polled (read back) in order to coordinate the PHY reset
completion with driver execution. After resetting the PHY, the driver should wait at least 50ms before
attempting any further operations on the PHY.

Auto-negotiation begins by enabling all the PHY capabilities in the Auto-Negotiation Advertisement
(0x1e1), then setting the Auto-negotiation Enable and Auto-negotiate Restart bits (12 and 9) in the

Host

Bus

Interf ace

MAC_CSR_CMD Register

MAC_CSR_Data Register

0xA4

0xA8

Of f set

MII_ACC_Register

MII_Data_Register

0x6

0x7

Index

Internal MII

External MII

(LAN9115 and

LAN9117

Basic Control Register

Basic Status Register

0
1

PHY  Register Index

2

3
4
5
6

17

29
30
31

PHY ID Register 1

PHY ID Register 2

A/N Adv ertisement Reg

Link Partner Ability  Reg

A/N Expansion Register

Mode Control Register

Interrupt Source Register

Interrupt Mask Register

Special Control Register

PHY Address  = 00001b

PHY  Address /= 00001b