STMicroelectronics M95M02-DRMN6TP Memory IC M95M02-DRMN6TP Hoja De Datos
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M95M02-DRMN6TP
DocID18203 Rev 8
M95M02-DR
Operating features
5 Operating
features
5.1
Supply voltage (V
CC
)
5.1.1
Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage
within the specified [V
CC
(min), V
CC
(max)] range must be applied (see Operating conditions
in
). This voltage must remain stable and valid until the
end of the transmission of the instruction and, for a Write instruction, until the completion of
the internal write cycle (t
the internal write cycle (t
W
). In order to secure a stable DC supply voltage, it is
recommended to decouple the V
CC
line with a suitable capacitor (usually of the order of
10 nF to 100 nF) close to the V
CC
/V
SS
device pins.
5.1.2 Device
reset
In order to prevent erroneous instruction decoding and inadvertent Write operations during
power-up, a power-on-reset (POR) circuit is included. At power-up, the device does not
respond to any instruction until VCC reaches the POR threshold voltage. This threshold is
lower than the minimum V
power-up, a power-on-reset (POR) circuit is included. At power-up, the device does not
respond to any instruction until VCC reaches the POR threshold voltage. This threshold is
lower than the minimum V
CC
operating voltage (see Operating conditions in
).
At power-up, when V
CC
passes over the POR threshold, the device is reset and is in the
following state:
•
•
in Standby Power mode,
•
deselected,
•
Status Register values:
–
–
The Write Enable Latch (WEL) bit is reset to 0.
–
The Write In Progress (WIP) bit is reset to 0.
–
The SRWD, BP1 and BP0 bits remain unchanged (non-volatile bits).
It is important to note that the device must not be accessed until V
CC
reaches a valid and
stable level within the specified [V
CC
(min), V
CC
(max)] range, as defined under Operating
conditions in
.
5.1.3 Power-up
conditions
When the power supply is turned on, V
CC
rises continuously from V
SS
to V
CC
. During this
time, the Chip Select (S) line is not allowed to float but should follow the V
CC
voltage. It is
therefore recommended to connect the S line to V
CC
via a suitable pull-up resistor (see
In addition, the Chip Select (S) input offers a built-in safety feature, as the S input is edge-
sensitive as well as level-sensitive: after power-up, the device does not become selected
until a falling edge has first been detected on Chip Select (S). This ensures that Chip Select
(S) must have been high, prior to going low to start the first operation.
sensitive as well as level-sensitive: after power-up, the device does not become selected
until a falling edge has first been detected on Chip Select (S). This ensures that Chip Select
(S) must have been high, prior to going low to start the first operation.
The V
CC
voltage has to rise continuously from 0 V up to the minimum V
CC
operating voltage
defined under Operating conditions in
, and the rise time
must not vary faster than 1 V/µs.