STMicroelectronics M95M02-DRMN6TP Memory IC M95M02-DRMN6TP Hoja De Datos

DocID18203 Rev 8

During power-down (continuous decrease of the V

CC

 supply voltage below the minimum 

V

CC

 operating voltage defined under Operating conditions in 

), the device must be:

•

deselected (Chip Select S should be allowed to follow the voltage applied on V

CC

),

•

in Standby Power mode (there should not be any internal write cycle in progress).

When Chip Select (S) is low, the device is selected, and in the Active Power mode. The 
device consumes I

CC

.

When Chip Select (S) is high, the device is deselected. If a Write cycle is not currently in 
progress, the device then goes into the Standby Power mode, and the device consumption 
drops to I

CC1

, as specified in DC characteristics (see 

).

The Hold (HOLD) signal is used to pause any serial communications with the device without 
resetting the clocking sequence.

To enter the Hold condition, the device must be selected, with Chip Select (S) low.

During the Hold condition, the Serial Data Output (Q) is high impedance, and the Serial Data 
Input (D) and the Serial Clock (C) are Don’t Care.

Normally, the device is kept selected for the whole duration of the Hold condition. 
Deselecting the device while it is in the Hold condition has the effect of resetting the state of 
the device, and this mechanism can be used if required to reset any processes that had 
been in progress.

(a)

 

(b)

a. This resets the internal logic, except the WEL and WIP bits of the Status Register.

b. In the specific case where the device has shifted in a Write command (Inst + Address + data bytes, each data 

byte being exactly 8 bits), deselecting the device also triggers the Write cycle of this decoded command.

ai02029E

c

HOLD

Hold 

condition

Hold 

condition