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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
For the EPA command, the 2 lowest bits of the FARG field define the number of pages to be erased
(FARG[1:0]):
(FARG[1:0]):
When the programming completes, the FRDY bit in the Flash Programming Status Register (EEFC_FSR) rises. If
an interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
an interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
Two errors can be detected in the EEFC_FSR register after a programming sequence:
Command Error: a bad keyword has been written in the EEFC_FCR register.
Lock Error: at least one page to be erased belongs to a locked region. The erase command has been refused, no
page has been erased. A command must be run previously to unlock the corresponding region.
page has been erased. A command must be run previously to unlock the corresponding region.
Flash Error: at the end of the programming, the EraseVerify test of the Flash memory has failed.
20.4.3.4 Lock Bit Protection
Lock bits are associated with several pages in the embedded Flash memory plane. This defines lock regions in the
embedded Flash memory plane. They prevent writing/erasing protected pages.
embedded Flash memory plane. They prevent writing/erasing protected pages.
The lock sequence is:
The Set Lock command (SLB) and a page number to be protected are written in the Flash Command Register.
When the locking completes, the FRDY bit in the Flash Programming Status Register (EEFC_FSR) rises. If an
interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
If the lock bit number is greater than the total number of lock bits, then the command has no effect. The result of
the SLB command can be checked running a GLB (Get Lock Bit) command.
the SLB command can be checked running a GLB (Get Lock Bit) command.
One error can be detected in the EEFC_FSR register after a programming sequence:
Command Error: a bad keyword has been written in the EEFC_FCR register.
Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has failed.
It is possible to clear lock bits previously set. Then the locked region can be erased or programmed. The unlock
sequence is:
sequence is:
The Clear Lock command (CLB) and a page number to be unprotected are written in the Flash Command
Register.
Register.
When the unlock completes, the FRDY bit in the Flash Programming Status Register (EEFC_FSR) rises. If an
interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
If the lock bit number is greater than the total number of lock bits, then the command has no effect.
One error can be detected in the EEFC_FSR register after a programming sequence:
Command Error: a bad keyword has been written in the EEFC_FCR register.
Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has failed.
The status of lock bits can be returned by the Enhanced Embedded Flash Controller (EEFC). The Get Lock Bit status
sequence is:
sequence is:
The Get Lock Bit command (GLB) is written in the Flash Command Register, FARG field is meaningless.
Lock bits can be read by the software application in the EEFC_FRR register. The first word read corresponds to
the 32 first lock bits, next reads providing the next 32 lock bits as long as it is meaningful. Extra reads to the
EEFC_FRR register return 0.
the 32 first lock bits, next reads providing the next 32 lock bits as long as it is meaningful. Extra reads to the
EEFC_FRR register return 0.
Table 20-4. FARG Field for EPA command:
FARG[1:0]
Number of pages to be erased with EPA command
0
4 pages
1
8 pages
2
16 pages
3
32 pages