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ATSAM4S-XPLD
437
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
27.4.5 PDC Flags and Peripheral Status Register
Each peripheral connected to the PDC sends out receive ready and transmit ready flags and the PDC sends back flags
to the peripheral. All these flags are only visible in the Peripheral Status Register.
to the peripheral. All these flags are only visible in the Peripheral Status Register.
Depending on the type of peripheral, half or full duplex, the flags belong to either one single channel or two different
channels.
channels.
27.4.5.1 Receive Transfer End
This flag is set when PERIPH_RCR register reaches zero and the last data has been transferred to memory.
It is reset by writing a non zero value in PERIPH_RCR or PERIPH_RNCR.
27.4.5.2 Transmit Transfer End
This flag is set when PERIPH_TCR register reaches zero and the last data has been written into peripheral THR.
It is reset by writing a non zero value in PERIPH_TCR or PERIPH_TNCR.
27.4.5.3 Receive Buffer Full
This flag is set when PERIPH_RCR register reaches zero with PERIPH_RNCR also set to zero and the last data has
been transferred to memory.
been transferred to memory.
It is reset by writing a non zero value in PERIPH_TCR or PERIPH_TNCR.
27.4.5.4 Transmit Buffer Empty
This flag is set when PERIPH_TCR register reaches zero with PERIPH_TNCR also set to zero and the last data has
been written into peripheral THR.
been written into peripheral THR.
It is reset by writing a non zero value in PERIPH_TCR or PERIPH_TNCR.