Microchip Technology MA240029 データシート
2010-2011 Microchip Technology Inc.
DS39996F-page 299
PIC24FJ128GA310 FAMILY
FIGURE 24-2:
EXAMPLE OF BUFFER ADDRESS GENERATION IN PIA MODE
(4-WORD BUFFERS PER CHANNEL)
(4-WORD BUFFERS PER CHANNEL)
Data RAM
Destination
A/D Module
(PIA Mode)
BBA
DMA Channel
DMADST
nn
(0-3)
1000h (DMA Base Address)
Range
Channel
ccccc
(0-31)
000 cccc cnn0
(IA)
1000h
DMABL<2:0> = 010
(16-Word Buffer Size)
(16-Word Buffer Size)
1008h
1010h
1018h
1010h
1018h
10F8h
1100h
1100h
Ch 0 Buffer (4 Words)
Ch 1 Buffer (4 Words)
Ch 2 Buffer (4 Words)
Ch 3 Buffer (4 Words)
Ch 2 Buffer (4 Words)
Ch 3 Buffer (4 Words)
Ch 29 Buffer (4 Words)
Ch 29 Buffer (4 Words)
Ch 31 Buffer (4 Words)
Ch 29 Buffer (4 Words)
Ch 31 Buffer (4 Words)
10F0h
(Buffer Base Address)
1000h
1002h
1004h
1006h
1002h
1004h
1006h
Ch 0, Word 0
Ch 0, Word 1
Ch 0, Word 2
Ch 0, Word 3
Ch 1, Word 0
Ch 1, Word 1
Ch 1, Word 2
Ch 1, Word 3
Ch 0, Word 1
Ch 0, Word 2
Ch 0, Word 3
Ch 1, Word 0
Ch 1, Word 1
Ch 1, Word 2
Ch 1, Word 3
1008h
100Ah
100Ch
100Eh
100Ah
100Ch
100Eh
0001 0000 0000 0000
0001 0000 0000 0010
0001 0000 0000 0100
0001 0000 0000 0110
0001 0000 0000 1000
0001 0000 0000 1010
0001 0000 0000 1100
0001 0000 0000 1110
DMA Base Address
Address Mask
Channel Address
Buffer Address
1038h
1040h
1040h
Ch 7 Buffer (4 Words)
Ch 8 Buffer (4 Words)
Ch 8 Buffer (4 Words)