Microchip Technology MA240029 データシート
PIC24FJ128GA310 FAMILY
DS39996F-page 300
2010-2011 Microchip Technology Inc.
REGISTER 24-1:
AD1CON1: A/D CONTROL REGISTER 1
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
ADON
—
ADSIDL
DMABM
(
)
DMAEN
MODE12
FORM1
FORM0
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0, HCS
R/C-0, HCS
SSRC3
SSRC2
SSRC1
SSRC0
—
ASAM
SAMP
DONE
bit 7
bit 0
Legend:
U = Unimplemented bit, read as ‘0’
R = Readable bit
W = Writable bit
HSC = Hardware Settable/Clearable bit
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
ADON:
A/D Operating Mode bit
1
= A/D Converter module is operating
0
= A/D Converter is off
bit 14
Unimplemented:
Read as ‘0’
bit 13
ADSIDL:
Stop in Idle Mode bit
1
= Discontinue module operation when device enters Idle mode
0
= Continue module operation in Idle mode
bit 12
DMABM:
Extended DMA Buffer Mode Select bit
(
)
1
= Extended Buffer mode: Buffer address is defined by the DMAnDST register
0
= PIA mode: Buffer addresses are defined by the DMA controller and AD1CON4<2:0>
bit 11
DMAEN:
Extended DMA/Buffer Enable bit
1
= Extended DMA and buffer features are enabled
0
= Extended features are disabled
bit 10
MODE12:
12-Bit Operation Mode bit
1
= 12-bit A/D operation
0
= 10-bit A/D operation
bit 9-8
FORM<1:0>:
Data Output Format bits (see formats following)
11
= Fractional result, signed, left-justified
10
= Absolute fractional result, unsigned, left-justified
01
= Decimal result, signed, right-justified
00
= Absolute decimal result, unsigned, right-justified
bit 7-4
SSRC<3:0>:
Sample Clock Source Select bits
1xxx
= Unimplemented, do not use
0111
= Internal counter ends sampling and starts conversion (auto-convert). Do not use in
Auto-Scan mode
0110
= Unimplemented
0101
= TMR1
0100
= CTMU
0011
= TMR5
0010
= TMR3
0001
= INT0
0000
= The SAMP bit must be cleared by software to start conversion
bit 3
Unimplemented:
Read as ‘0’
bit 2
ASAM:
A/D Sample Auto-Start bit
1
= Sampling begins immediately after last conversion; SAMP bit is auto-set
0
= Sampling begins when SAMP bit is manually set
Note 1:
This bit is only available when Extended DMA/Buffer features are available (DMAEN = 1).