Samsung 1GB 400MHz DDR M368L2923DUN-CCC 전단

Note :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability. 

Voltage on any pin relative to V

SS

V

IN,

V

OUT

-0.5 ~ 3.6

V

Voltage on V

DD

 & V

DDQ 

supply relative to V

SS

V

DD,

V

DDQ

-1.0 ~ 3.6

V

Storage temperature

T

STG

-55 ~ +150

°C

Power dissipation

P

D

1.5 * # of component

W

Short circuit current

I

OS

50

mA

Recommended operating conditions(Voltage referenced to V

SS

=0V, T

A

=0 to 70

°C) 

Note : 
1. V

REF

 is expected to be equal to 0.5*V

DDQ

 of the transmitting device, and to track variations in the dc level of same. Peak-to peak noise on V

REF

 may 

not exceed +/-2% of the dc value.

2. V

TT

 is not applied directly to the device. V

TT

 is a system supply for signal termination resistors, is expected to be set equal to  V

REF

, and must track 

variations in the DC level of V

REF

.

3.  V

ID

 is the magnitude of the difference between the input level on CK and the input level on CK.

4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire temperature and voltage range, 

for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the maximum difference between pullup and pulldown drivers 
due to process variation. The full variation in the ratio of the maximum to minimum pullup and pulldown current will not exceed 1.7 for device drain to 
source voltages from 0.1 to 1.0. 

Supply voltage(for device with a nominal V

DD

 of 2.5V for DDR333)

V

DD

2.3

2.7

V

Supply voltage(for device with a nominal V

DD

 of 2.6V for DDR400)

V

DD

2.5

2.7

V

I/O Supply voltage(for device with a nominal V

DD

 of 2.5V for DDR333)

V

DDQ

2.3

2.7

V

I/O Supply voltage(for device with a nominal V

DD

 of 2.6V for DDR400)

V

DDQ

2.5

2.7

V

I/O Reference voltage

V

REF

0.49*VDDQ

0.51*VDDQ

V

1

I/O Termination voltage(system)

V

TT

V

REF

-0.04

V

REF

+0.04

V

2

Input logic high voltage

V

IH

(DC)

V

REF

+0.15

V

DDQ

+0.3

V

Input logic low voltage

V

IL

(DC)

-0.3

V

REF

-0.15

V

Input Voltage Level, CK and CK inputs

V

IN

(DC)

-0.3

V

DDQ

+0.3

V

Input Differential Voltage, CK and CK inputs

V

ID

(DC)

0.36

V

DDQ

+0.6

V

3

V-I Matching: Pullup to Pulldown Current Ratio

VI(Ratio)

0.71

1.4

-

4

Input leakage current

I

I

-2

2

uA

Output leakage current

I

OZ

-5

5

uA

Output High Current(Normal  strengh driver) ;V

OUT

 = V

TT

 + 0.84V

I

OH

-16.8

mA

Output High Current(Normal  strengh driver)  ;V

OUT

 = V

TT

 - 0.84V

I

OL

16.8

mA

Output High Current(Half  strengh driver) ;V

OUT

 = V

TT

 + 0.45V

I

OH

-9

mA

Output High Current(Half  strengh driver)  ;V

OUT

 = V

TT

 - 0.45V

I

OL

9

mA