Texas Instruments CC2650DK 사용자 설명서
UARTS Registers
19.7.1 UART Registers
lists the memory-mapped registers for the UART. All register offset addresses not listed in
should be considered as reserved locations and the register contents should not be modified.
Table 19-3. UART Registers
Offset
Acronym
Register Name
Section
0h
DR
Data
4h
RSR
Status
4h
ECR
Error Clear
18h
FR
Flag
24h
IBRD
Integer Baud-Rate Divisor
28h
FBRD
Fractional Baud-Rate Divisor
2Ch
LCRH
Line Control
30h
CTL
Control
34h
IFLS
Interrupt FIFO Level Select
38h
IMSC
Interrupt Mask Set/Clear
3Ch
RIS
Raw Interrupt Status
40h
MIS
Masked Interrupt Status
44h
ICR
Interrupt Clear
48h
DMACTL
DMA Control
1336
Universal Asynchronous Receivers and Transmitters (UARTS)
SWCU117A – February 2015 – Revised March 2015
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