Microchip Technology MA240029 데이터 시트
2010-2011 Microchip Technology Inc.
DS39996F-page 227
PIC24FJ128GA310 FAMILY
bit 4-2
SPRE<2:0>:
Secondary Prescale bits (Master mode)
111
= Secondary prescale 1:1
110
= Secondary prescale 2:1
.
.
.
000
.
.
000
= Secondary prescale 8:1
bit 1-0
PPRE<1:0>:
Primary Prescale bits (Master mode)
11
= Primary prescale 1:1
10
= Primary prescale 4:1
01
= Primary prescale 16:1
00
= Primary prescale 64:1
REGISTER 16-2:
SPI
X
CON1: SPIx CONTROL REGISTER 1 (CONTINUED)
Note 1:
If DISSCK = 0, SCKx must be configured to an available RPn pin. See
Section 11.4 “Peripheral Pin
Select (PPS)”
for more information.
2:
If DISSDO = 0, SDOx must be configured to an available RPn pin. See
Section 11.4 “Peripheral Pin
Select (PPS)”
for more information.
3:
The CKE bit is not used in the Framed SPI modes. The user should program this bit to ‘0’ for the Framed
SPI modes (FRMEN = 1).
SPI modes (FRMEN = 1).
4:
If SSEN = 1, SSx must be configured to an available RPn/PRIn pin. See
Section 11.4 “Peripheral Pin
Select (PPS)”
for more information.