Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

6:0

THS

Unsigned 7-bit rate threshold value

• The contents should only be modified when the device is in Standby mode
• The internal state of the Rate Threshold function is reset when a transition from Standby to Active

or Ready to Active modes occurs.

•

The rate threshold in dps is given by the following formula:

RT_COUNT sets the number of debounce counts. See 

 for more

details.

Bit

7

6

5

4

3

2

1

0

Read

D[7:0]

Write

Reset

0

0

0

0

0

0

0

1

7:0

D

Debounce counter value

• The contents should only be modified when the device is in Standby mode
• A transition from Standby to Active or Ready to Active modes resets the internal state of the Rate

Threshold function.

• Stores the number of counts with the angular rate above the threshold needed before asserting

the rate threshold event flag

• The counter period is the same as the selected ODR period, allowing for a debounce time to be

calculated. For example, an RT_COUNT value of 10 (decimal) and an ODR of 100 Hz would
result in a debounce time of 100 ms.

The TEMP register contains an 8-bit 2's complement temperature value with a range
of –128 °C to +127 °C, with a scaling of 1 °C/LSB. This register is reset only by a
hard reset event (POR/RST_B pin assertion); a soft reset, such as setting

CTRL_REG1[RST] = 1, will not reset the contents of this register. The temperature
data is only compensated when the device is operating in the Active mode.

Xtrinsic 3-Axis Digital Angular Rate Gyroscope, Rev1.2, 7/2014.

Freescale Semiconductor, Inc.