Texas Instruments UCD3138 Digital Power Factor Correction Pre-regulator Evaluation Module UCD3138PFCEVM-026 사용자 매뉴얼

차례

• Using the UCD3138PFCEVM-026

  1
  • 1 Introduction

    3
  • 2 Description

    4
    • 2.1 Typical Applications

      4
    • 2.2 Features

      4
  • 3  Electrical Performance Specifications

    5
  • 4 Schematics

    6
  • 5 Test Setup

    8
    • 5.1 Test Equipment

      8
    • 5.2  Recommended Test Setup

      8
  • 6 List of Test Points

    10
  • 7 List of Terminals

    10
  • 8 Test Procedure

    11
    • 8.1 Efficiency Measurement Procedure

      11
    • 8.2 Equipment Shutdown

      11
  • 9 Performance Data and Typical Characteristic Curves

    12
    • 9.1 Efficiency

      12
    • 9.2 Power Factor

      12
    • 9.3  Input Current at 115 VAC and 60 Hz

      13
    • 9.4 Input Current at 230 VAC and 50 Hz

      14
    • 9.5 Output Voltage Ripple

      15
    • 9.6 Output Turn On

      16
    • 9.7 Total Harmonic Distortion (THD)

      17
    • 9.8 Other Waveforms

      17
  • 10 EVM Assembly Drawing and PCB Layout

    19
  • 11 List of Materials

    22
  • 12 Digital PFC Description

    25
    • 12.1 1PFC Block Diagram

      25
      • 12.1.1 Single-Phase PFC Block Diagram

        25
      • 12.1.2 2-Phase PFC Block Diagram

        26
      • 12.1.3 Bridgeless PFC Block Diagram

        26
    • 12.2 UCD3138 Pin Definition

      27
      • 12.2.1 UCD3138 Pin Definition in Single-Phase PFC

        27
      • 12.2.2 UCD3138 Pin Definition in 2-Phase PFC

        28
      • 12.2.3 UCD3138 Pin Definition in Bridgeless PFC

        28
    • 12.3 EVM Hardware – Introduction

      29
      • 12.3.1 PFC Pre-Regulator Input

        29
      • 12.3.2 PFC Power Stage

        30
      • 12.3.3 Non-Isolated UART Interface

        32
      • 12.3.4 Isolated UART Interface

        33
      • 12.3.5 Interface Connector of Control Card

        34
      • 12.3.6 UCD3138 Resource Allocation for PFC Control

        35
    • 12.4 EVM Firmware – Introduction

      37
      • 12.4.1 Background Loop

        38
      • 12.4.2 Voltage Loop Configuration

        38
      • 12.4.3 Current Loop Configuration

        38
      • 12.4.4 Interrupts

        38
    • 12.5 State Machine

      39
    • 12.6 PFC Control Firmware

      39
    • 12.7 System Protection

      40
      • 12.7.1 Cycle-by-Cycle Current Protection (CBC)

        40
      • 12.7.2 Over-Voltage Protection (OVP)

        40
    • 12.8 PFC System Control

      40
      • 12.8.1 Average Current Mode Control

        41
      • 12.8.2 ZVS and Valley Control

        41
    • 12.9 Current Feedback Control Compensation Using PID Control

      41
      • 12.9.1 Loop Compensation from Poles and Zeros in s-Domain

        42
      • 12.9.2 Feedback Loop Compenstaion Tuning with PID Coefficients

        44
      • 12.9.3 Feedback Loop Compensation with Multiple-Set of Parameters

        44
    • 12.10 Voltage Feedback Loop

      44
  • 13 Evaluating the Single-Phase PFC with GUI

    45
    • 13.1 Graphical User Interface (GUI)

      45
    • 13.2 Open the Designer GUI

      45
    • 13.3 Overview of the Designer GUI

      46
      • 13.3.1 Monitor

        46
      • 13.3.2 Status

        47
      • 13.3.3 Design and Configure

        47
  • 14 Monitoring, Re-configuring and Re-tuning with Designer GUI

    48
    • 14.1 Power On and Test Procedure

      48
    • 14.2 Monitoring with GUI

      49
    • 14.3 Configuration and Re-configuring with GUI

      50
    • 14.4 Feedback Control Loop Tuning and Re-Tuning with GUI

      51
      • 14.4.1 Current Loop Evaluation

        52
      • 14.4.2 Current Loop Re-Tuning

        53
      • 14.4.3 Voltage Loop Evaluation and Re-tuning

        54
  • 15 Digital PFC Firmware Development

    55
  • 16 References

    55
• Important Notices

  56